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On the wire
Markets EdgeLOUIS XIIIMay 29, 20262 min readAd-free

India approves 12 semiconductor plants under ISM 2.0. $11 billion Gujarat fab gets ASML tooling.

State backing accelerates capacity buildout, but talent pipelines and equipment depth remain the binding constraints through 2028.

Markets Edge deskMarkets Edge · Huang GoodmanSource: Indian Express ↗
Edgar's SEC data profile {actuarial version}
In plain words

India approved **12** semiconductor plants under ISM 2.0, anchored by Tata's **$11 billion** Gujarat fab with ASML tooling, but talent and equipment supply gaps delay meaningful capacity through 2028.

12
fabrication and assembly facilities across Gujarat
$11 billion
Dholera fab anchors the expansion
50,000
wafers per month with ASML lithography equipment under a…
$15 billion
in commitments but delivered three operational facilities by late…

India's 2026 Budget formalized India Semiconductor Mission 2.0, greenlighting 12 fabrication and assembly facilities across Gujarat, Karnataka, and Assam. Tata Electronics' $11 billion Dholera fab anchors the expansion, targeting 50,000 wafers per month with ASML lithography equipment under a freshly signed MOU. The original ISM 1.0, launched in 2021, drew $15 billion in commitments but delivered three operational facilities by late 2025. ISM 2.0 extends the incentive envelope and adds explicit subsidy lines for packaging and test infrastructure, addressing the middle segments foreign buyers flagged as weak in diligence.

The Dholera project marks the first commercial-scale node below 28nm on Indian soil. ASML's involvement signals confidence in execution timelines, though the MOU stops short of committing extreme ultraviolet systems. Tata plans first-silicon by Q4 2027, a 20-month buildout that assumes uninterrupted equipment delivery and a trained workforce the company does not yet have at scale. The finance ministry allocated ₹30,000 crore in fiscal 2027 for talent development and fabrication equipment subsidies, up from ₹18,000 crore under ISM 1.0. The gap between approved capacity and operational readiness widens when talent pipelines lag by 18 to 24 months, a pattern visible in Malaysia and Vietnam during their respective semiconductor pushes.

The approved facilities skew toward assembly, test, marking, and packaging rather than leading-edge logic. Eight of the 12 plants focus on backend operations, serving automotive and industrial endpoints where India already holds design relationships with Bosch, Renesas, and Texas Instruments. Frontend capacity remains concentrated in the Dholera fab and a second Tata project in Jagiroad, Assam, both trailing the 5nm nodes Taiwan and South Korea deploy at volume. ISM 2.0 does not close the equipment supply gap. India imports 98% of semiconductor manufacturing equipment, and the Budget's domestic tooling line funds prototypes, not production systems. Without partnerships with Applied Materials, Lam Research, or Tokyo Electron beyond ASML, equipment diversity remains a chokepoint through 2029.

Allocators should track three signals. Tata's equipment procurement announcements in Q2 2026 will clarify whether ASML's partnership extends to integrated metrology and deposition tools or remains confined to lithography. The talent pipeline becomes visible in H2 2026 when the first cohorts from ISM-funded engineering programs graduate; fewer than 12,000 qualified process engineers are available today against a projected need for 60,000 by 2028. Third, watch backend facility utilization rates in late 2026. Packaging plants in Sanand and Noida received state incentives but report 40% utilization due to insufficient domestic substrate supply and reliance on Malaysian imports.

The ISM 2.0 approval cycle took 11 months from application to greenlight, faster than ISM 1.0's 19-month median. Speed reflects streamlined state coordination, not solved technical gaps. India holds 15% global share in chip design but under 1% in fabrication. The Dholera fab's 50,000 wafers per month, if delivered on schedule, moves that figure to 2.1% by 2028, still a rounding error against TSMC's 1.5 million wafers monthly. The equipment MOU with ASML is the signal; the 60,000 engineers India needs to hire are the constraint.

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For the principal

Monitor Tata's Q2 2026 equipment orders closely; backend utilization rates in Sanand and Noida will signal execution quality before committing capital.

For the operator

Short-term plays favor backend ATMP facilities over frontend fabs; talent shortages and equipment dependencies make 2027 silicon targets speculative, not bankable.

For the house

We maintain underweight India semiconductor exposure until talent pipelines demonstrate scale; backend packaging names with Malaysian substrate hedges offer cleaner entry by Q3 2026.

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Sources and method
  • Primary report: Indian Express, May 29, 2026.
  • Written with artificial intelligence from public sources and published without individual human review. Corrections: jenny@pops4.com.
indiasemiconductorstata electronicsasmlism 2.0manufacturing

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