Micron Technology revised its planned U.S. manufacturing outlay to $250 billion through 2035, up from the $200 billion figure announced in 2022, and broke ground on its Clay, New York cleanroom complex this week. The increment arrives eighteen months into a global memory trough that has seen DRAM spot prices decline 41% since their 2022 peak, making the timing notable rather than obvious.

The New York site will produce leading-edge DRAM on nodes below 1-alpha nanometer-class, with volume production scheduled for late 2027 and full ramp by 2030. The company is deploying extreme ultraviolet lithography across both the Clay facility and its complementary Idaho expansion, targeting initial output of 50,000 wafer starts per month at the New York location by decade-end. Micron secured $6.1 billion in CHIPS Act grants and $7.5 billion in federal loan commitments, alongside $5.5 billion in New York state incentives, making this the largest public-private manufacturing arrangement in U.S. semiconductor history by subsidy density per wafer.

The revision matters because it locks Micron into a domestic footprint at the moment competitors are diverging. Samsung delayed its Texas advanced packaging line by eight quarters in November, and SK hynix continues to concentrate HBM4 development in South Korea despite $450 million in Indiana site preparation already spent. Micron's commitment creates a credible threat of domestic supply for hyperscale AI infrastructure buyers who currently source 87% of HBM3E from a single country. The New York complex is designed for 20-high HBM4 stacks with through-silicon vias, the architecture Nvidia specified for its Rubin platform shipping in 2026. Microsoft, Meta, and Google each operate data center construction pipelines exceeding 15 gigawatts of new capacity through 2027, and all three have opened discussions on long-term HBM offtake tied to U.S. production, according to supply chain counsel briefed on the conversations.

The $50 billion uplift also clarifies capital intensity assumptions across the memory sector. Micron's revised spend implies $12.5 billion annually through the next decade, roughly 180% of its trailing five-year average capex and 22% of projected revenue at mid-cycle pricing. That ratio suggests the company is embedding structural HBM mix assumptions above 30% of bit output by 2030, versus 11% today. The margin differential matters: HBM3E commands $1,400 per unit at current contract rates, versus $8 for commodity DDR5 modules on a per-gigabyte basis, a 17,000% premium that survives even after normalizing for die count and packaging complexity.

Operators should monitor Micron's equipment delivery schedules through the New York site during Q2 and Q3 2025, particularly ASML's NXE:3800E scanner shipments, which will clarify whether the company is pulling forward 2028 capacity into 2027 or merely announcing previously planned outlays under federal matching requirements. The company's next earnings call in late March will be the first opportunity to hear management reconcile the higher capital guidance with bit growth assumptions. Separately, watch whether Samsung or SK hynix announce U.S. fab expansions within 90 days—silence would confirm Micron's domestic positioning as defensible through the current technology cycle.

The New York facility's 2027 production start lands sixteen months before the CHIPS Act's domestic content requirements escalate from 50% to 65%, a threshold that applies to memory used in Defense Department systems starting January 2029.