NITI Aayog released a ten-year roadmap targeting a $120-150 billion semiconductor value chain by 2035, codifying India's intent to capture global design share and establish domestic manufacturing. The policy document commits government coordination across subsidies, talent pipelines, and infrastructure buildout for both front-end fabrication and back-end assembly.
The roadmap follows $10 billion in approved Production-Linked Incentive schemes since 2021 and three greenfield fab commitments—Micron's $2.75 billion ATMP facility in Gujarat, Tata Electronics' $11 billion fab partnership with Powerchip in Dholera, and CG Power's proposed $3 billion compound semiconductor plant. None are operational. NITI's framework now layers multi-year talent mandates, R&D cluster funding, and export credit lines atop the PLI architecture. The $120-150 billion target implies 15-18% compound annual growth from India's current $15 billion semiconductor consumption base, assuming domestic value capture rises from negligible to 40-50% by decade-end.
The signal matters because it formalizes India's bid to diversify the $600 billion global semiconductor supply chain at the exact moment Western allocators are derisking Taiwan exposure. TSMC holds 54% of foundry share; a 7.5-magnitude Taiwan Strait event would halt 92% of leading-edge logic production. India offers rule-of-law stability, English-language engineering talent at 25-30% of Silicon Valley cost, and a government willing to write subsidy checks without the geopolitical strings attached to CHIPS Act funding. The roadmap's emphasis on design services—where India already commands 20% global share via Bengaluru and Hyderabad engineering centers—suggests near-term revenue capture before fabs ramp. Compound semiconductors for power electronics and RF also sidestep the leading-edge node race, a pragmatic choice given India's decade lag in lithography and cleanroom infrastructure.
Allocators should watch first-silicon timelines at Micron Gujarat in Q2 2025 and Tata's Dholera fab, scheduled for 2026 production start. Talent constraints remain binding: India graduates 1.5 million engineers annually, but fewer than 20,000 hold semiconductor-relevant credentials. NITI's roadmap includes IIT curriculum mandates and a $500 million skilling fund; execution will show in placement data by late 2025. Equipment export approvals from ASML, Applied Materials, and Tokyo Electron are the tell for whether India's ecosystem attracts cutting-edge tooling or remains confined to mature nodes. Policy continuity past the 2029 general election is the structural risk—subsidy commitments span three election cycles.
The $120-150 billion target will not be met if India replicates China's fab overcapacity errors or if talent pipelines stay shallow. The roadmap's value is the explicit coordination signal: New Delhi intends to compete for the $280 billion in semiconductor capex the industry will deploy between now and 2030. That capital has to land somewhere outside Taiwan.