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JOHNNIE BLUE · June 5, 2026

India targets $120-150B semiconductor value chain by 2035, NITI Aayog calls for 33% government funding

Uttar Pradesh revamps chip policy as Delhi maps path to cut $240B import exposure and claim fabrication share.

India's NITI Aayog published a policy framework this week positioning the nation to construct a $120–150 billion semiconductor ecosystem by 2035, requiring the central government to commit 33% of total capital outlays. The report arrives as Uttar Pradesh—home to Noida's existing electronics corridor—amended its semiconductor incentive structure to court large-scale fabrication projects. The twin moves signal Delhi's intent to shift from assembly-focused electronics manufacturing toward front-end wafer production, a segment where India holds negligible global share.

The NITI report frames the build-out as import substitution arithmetic. India's semiconductor import bill reached $240 billion in the twelve months through March, a figure the authors project will double by 2035 absent domestic capacity. The proposed value chain spans wafer fabrication, advanced packaging, compound semiconductors, and design-services clusters, with a target of 50% local content by volume within the decade. Uttar Pradesh's policy revision removes per-project subsidy caps and extends tax holidays to 15 years for greenfield fabs, matching incentives already live in Gujarat and Karnataka. The state is courting at least two undisclosed memory-chip proposals, according to statements from the UP Investment Promotion Bureau.

The arithmetic matters because India's current semiconductor posture is almost entirely design-IP and backend testing. The country hosts 2,500 chip-design engineers and claims 20% of global fabless design services revenue, but operates zero leading-edge fabs and minimal compound-semiconductor capacity. NITI's framework acknowledges the capital intensity: a single 12-inch logic fab requires $10–15 billion and 24–30 months to first wafer. The 33% government co-investment ratio implies Delhi and state treasuries deploying $40–50 billion over the next decade, a sum that dwarfs the ₹760 billion ($9.1 billion) allocated under the existing India Semiconductor Mission launched in late 2021. That program has approved three projects—two compound-semiconductor units and one OSAT facility—none yet in production.

Allocators watching Asian supply-chain realignment should track three variables. First, whether Delhi secures a Tier-1 foundry partner—TSMC, Samsung, or Intel—to anchor a logic node. Taiwan's TSMC has publicly declined Indian inquiries twice since 2022, citing infrastructure and talent constraints. Second, the timeline for Uttar Pradesh's first fabrication groundbreaking. The state has designated 1,000 acres near Greater Noida for semiconductor parks but has yet to announce anchor tenants. Third, the Ministry of Electronics' revision of import-substitution mandates for telecom and defense contracts, which would create captive demand and de-risk private capital. The NITI report assumes 50% of India's 2035 chip consumption comes from domestic sources, implying policy-driven demand guarantees rather than open-market pricing.

The $120–150 billion figure lands India in the range South Korea committed under its K-Chips Act and roughly one-third of the cumulative outlay in the U.S. CHIPS Act. The difference is brownfield versus greenfield: Seoul and Washington are expanding existing ecosystems, while India is building fabrication capability from near zero. The import-substitution framing is narrow. The report does not model India as an export hub, and the 50% local-content target is a volume metric, not a value metric, meaning India could theoretically hit the goal by fabricating mature-node chips for domestic automotive and industrial use while still importing leading-edge logic from Taiwan. The next datapoint is the Ministry of Electronics' April budget submission, which will reveal whether the 33% co-investment model has cabinet backing or remains an Aayog aspiration.

The takeaway
India maps $40–50B public funding for chip ecosystem, but lacks Tier-1 foundry anchor and executable fab timeline.
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